STY 2013 Final Cheat Sheet

A Programming › Assembly cheat sheet in English by [deleted]

STY 2013 Final

Array Assembly Sty Registers Flags Cache Jumps Shifts Signals Memnory

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assembly: registers and flags

%eax \| %ecx \| %edx \| %ebx \| %esi \| %edx	Temporary data, General purpose registers
%esp \| %ebp	Current: stack top \| stack frame
%eip	Instruction pointer
CF \| ZF \| SF \| OF	Carry flag \| Zero flag \| Sign flag \| Overflow flag

Note: flags are not set by lea instruction.

assembly: jumps and shifts

sal \| sar	arithmetic shift left \| right
shl \| shr	logical shift left \| right
jz \| jnz	jump if == 0,"zero" \| != 0,"not zero"
je \| jne \| jg \| jge \| jl \| jle	jump if == \| != \| > \| >= \| < \| <=
js	jump and store
jmp \| jmp *reg	unconditional relative jump\| absolute jump, reg is a registry.
ja \| jb (unsigned)	jump above \| below

assembly: compares and flags

cmp b, a	a - b
test b, a	a & b
zf "zero flag"	set when a&b== 0
sf "signed flag"	set when a&b < 0

assembly: getting setting

lea a, b	load effective address a into b
mov a, b	move contents of a into b
cmov (z,nz,e,ne,g,ge,l,le,ng,nge,nl,nle,a,b, ...)	compare and move if condition is met.
movl %edx, %eax	eax = edx, eax bendir á edx
movl (%edx), %eax	eax = *edx, eax verður bendir á innihald edx
movl %edx, (%eax)	*eax = edx, eax bendir á bendinn að innihaldi edx
movl (%edx), (%eax)	eax = edx, yfirskrifar innihald eax með innihaldi edx.

Array shizznit

address(mn[i][j]) = 0+i*N+4j

address(nm[i][j]) = 0+i*M+4j

Given the arrays:
int mn[M][N]; and int nm[N][M];

Reading a disk sector(sequence)

1: CPU initiates disk read, writes cmd, lbn and desk to a DC port(address)

2: DC reads sector and performs a DMA transfer into main memory

3: DC notifies CPU with interrupt signal when DMA transfer completes

DC: Disk controller
DMA: direct memory access
cmd: command
lbn: logical block number
dest: destination

Memory system parameters

N=2ⁿ	Number of addresses in virtual address space
M=2^m	Number of addresses in physical address space
P=2^p	Page size(bytes)

Components of PA(physical address)

PPO	Physical page offset(same as VPO)
PPN	Physical page number.
CO	Byte offset within cache line
CI	Cache index
CT	Cache tag

Components of VA(Virtual Address)

TLBI	TLB index
TLBT	TLB tag
VPO	Virtual page offset
VPN	Virtual page number

Locality

Temporal locality:
> Recently referenced items are likely to be referenced again in the near future.
Spatial locality:
> Items with nearby addresses tend to be referenced close together in time.

Memory Hierarchy

Simple Memory System TLB

Simple Memory System Cache

Cache

TLB	holds recently used PTE's, located on the cpu chip.
PTE	Page table entry, physical address of data in cache/memory

Signals

ID	Name	Default Action	Event
2	SIGINT	Terminate	Interupt,ctrl-c
9	SIGKILL	Terminate	Kill (unavoidable)
11	SIGSEGV	Terminate&Dump	Segfault
14	SIGALRM	Terminate	Timer signal
15	SIGTERM	Terminate	Kill nicely(catchable)
17	SIGCHLD	Ignore	Child stoppd or killd

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%eax \| %ecx \| %edx \| %ebx \| %esi \| %edx	Temporary data, General purpose registers
%esp \| %ebp	Current: stack top \| stack frame
%eip	Instruction pointer
CF \| ZF \| SF \| OF	Carry flag \| Zero flag \| Sign flag \| Overflow flag

sal \| sar	arithmetic shift left \| right
shl \| shr	logical shift left \| right
jz \| jnz	jump if == 0,"zero" \| != 0,"not zero"
je \| jne \| jg \| jge \| jl \| jle	jump if == \| != \| > \| >= \| < \| <=
js	jump and store
jmp \| jmp *reg	unconditional relative jump\| absolute jump, reg is a registry.
ja \| jb (unsigned)	jump above \| below