ARM instructions cheatsheet
.data
@variables
.text
.global main
@code
|
Type
|
Mnemonic
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Bytes size
|
|
Word
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4
|
|
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Half word
|
h
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2
|
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Byte
|
b
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1
|
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#
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Purpose
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Description
|
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R0 - R12
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General Purpose
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Stores temporary values, pointers...
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R13
|
SP - Stack Pointer
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Top of the stack. Allocate space to the stack by substracting the value in bytes that we want to allocate from the stack pointer.
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R14
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LR - Link Register
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When a function call is made, LR gets pdated with a memory address referencing the next instruction where the function was initiated from
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R15
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PC - Program Counter
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Automatically incremented by the size of the instruction executed
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Flag
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Meaning
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Enable if result of the instruction yields a...
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N
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Negative
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Negative number
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Z
|
Zero
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Zero value
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C
|
Carry
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Value that requires a 33rd bit to be fully represented
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V
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Overflow
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Value that cannot be represented in 32 bit two's complement
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#123
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Inmediate value
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Rx
|
Register x
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Rx, LSL n
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Register x with logical shift left by n bits
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Rx, LSR n
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Register x with logical shift right by n bits
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MNEMONIC
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Description
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{S}
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An optional suffix. If S is specified, the condition flags are updated on the result of the operation
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{condition}
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Condition that is needed to be met in order for the instruction to be executed
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{Rd}
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Register destination for storing the result of the instruction
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Operand1
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First operand. Either a register or an inmediate value
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Operand2
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Second (flexible) operand. Either an inmediate value (number) or a register with an optional shift
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Instruction
|
Description
|
|
MOV
|
Move data
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MVN
|
Move and negate
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ADD
|
Addition
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SUB
|
Substraction
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MUL
|
Multiplication
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LSL
|
Logical Shift Left
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LSR
|
Logical Shift Right
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ASR
|
Arithmetic Shift Right
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CMP
|
Compare
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CMN
|
Compare and negate
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AND
|
Bitwise AND
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ORR
|
Bitwise OR
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EOR
|
Bitwise XOR
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LDR
|
Load
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STR
|
Store
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LDM
|
Load Multiple
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STM
|
Store Multiple
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B
|
Branch
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BL
|
Branch with Link
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BX
|
Branch and eXchange
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BLX
|
Branch with Link and eXchange
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BIC
|
Bit Clear
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Offset
str r2, [r1, #2]Store the value found in R2 to the memory address found in R1 plus 2. Base register unmodified. |
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Pre-indexed
str r2, [r1, #4]!Store the value found in R2 to the memory address found in R1 plus 4. Base register (R1) modified: R1= R1+4 |
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Post-indexed
ldr r3, [r1], r2, LSL#2Load the value at memory address found in R1 to the register R3. Then modify base register: R1 = R1+R2<<2 |
STR Ra, [Rb, imm]
LDR Ra, [Rc, imm]ldr r3, [r1, #4]!
ldr r3, [r1, r2]!
ldr r3, [r1, r2, LSL#2]!ldr r3, [r1], #4
ldr r3, [r1], r2
ldr r3, [r1], r2, LSL#2ldr r3, [r1, #4]
ldr r3, [r1, r2]
ldr r3, [r1, r2, LSL#2]
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Mnemonic
|
Description
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Flags
|
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EQ
|
Equals
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Z=1
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NE
|
Non equals
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Z=0
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HI
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Higher than (NS)
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C=1 & Z=0
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LS
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Less than (NS)
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C=0 | Z=1
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GE
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Greater or equals (WS)
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N=V
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LT
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Less than (WS)
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N!=V
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GT
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Greater than (WS)
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Z=0 & N=V
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LE
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Less or equals than (WS)
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Z=1 | N!=V
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(empty)
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Always (non conditional)
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